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janwas
52ae284a7e
add update mechanism (needed to safely handle counter rollover) and lock-free synchronization. refactor: . Counters now have Activate/Shutdown interface rather than throwing exceptions from the ctor. . whrt is responsible for caching frequency/resolution etc. . fix counterBits handling This was SVN commit r5105.
26 lines
882 B
C
26 lines
882 B
C
/**
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* =========================================================================
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* File : pit.h
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* Project : 0 A.D.
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* Description : Timer implementation using 82C53/4 PIT
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* =========================================================================
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*/
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// license: GPL; see lib/license.txt
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#ifndef INCLUDED_PIT
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#define INCLUDED_PIT
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// note: we don't access the PIT for two reasons:
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// - it rolls over every 55 ms (1.193 MHz, 16 bit) and would have to be
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// read at least that often, which would require setting high thread
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// priority (dangerous).
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// - reading it is slow and cannot be done by two independent users
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// (the second being QPC) since the counter value must be latched.
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//
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// there are enough other counters anway.
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static const i64 PIT_FREQ = 1193182; // (= master oscillator frequency/12)
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#endif // #ifndef INCLUDED_PIT
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